Adaptive power cycle sequences for data recovery

ABSTRACT

The present invention relates to an apparatus, method, and/or sequence that adaptively provide the recovery of data after a power cycle sequence, wherein only minimal updates are provided for control blocks associated with the data.

This application is a continuation of application Ser. No. 15/176,156,filed Jun. 08, 2016 and issuing Jan. 15, 2019 as U.S. Pat. No.10,180,887, which is a continuation of application Ser. No. 13/253,912,filed Oct. 5, 20011 and issued as U.S. Pat. No. 9,372,755 on Jun. 21,2016, each of which is incorporated by reference herein.

BACKGROUND

(1) Technical Field

The present invention relates to computer storage systems, such as datastorage devices that use data recovery.

(2) Description of Related Art

Typically, a storage system experiencing power failure at the middle ofa process either acquires corrupted data or loses the data in a worstcase scenario. The usual technique of easy data recovery is that upondata modification, the controls and directories associated to the dataare also updated. This type of technique consumes relatively larger timeand bandwidth. Consequently, there is a need for efficient power cyclesequences capable of data recovery.

The directory structure of a hybrid storage system is very hierarchical.This structure includes controls and directories arranged in a linkedlist manner. Constant updates of these directories are not only verytime and bandwidth consuming but moreover, update synchronization isdifficult considering the different directory levels that are containedin different memory blocks. Consequently, there is a need for sequencesthat are sufficiently adaptive to determine when these directories needto be updated and when the directories require no updates, therebyminimizing directory updates.

Normally, the control information is contained in the control blocksalone. Putting the controls in one block allows rebuilding of alldirectory structures, and this rebuilding even includes the rebuildingof unrelated information. This results in the wasting of time andbandwidth during the rebuilding process. Consequently, there is a needto achieve an improved and more efficient rebuilding of control datathat has been corrupted.

SUMMARY

The present invention relates to an apparatus, method, and/or sequencethat adaptively provide the recovery of data after a power cyclesequence, wherein only minimal updates are provided for control blocksassociated with the data.

A power outage without notification can cause data corruption and/ordata loss in storage systems. An example of such causes of datacorruption is when at the middle of a system update process, anunexpected power failure occurs.

Embodiments of the invention further provide an apparatus, methods,and/or sequences which minimize data corruption and/or loss, and canrecover the aforementioned corrupted and/or lost data by utilizing (i)data relocation, (ii) preventive safe sequence of data updates, and(iii) power cycle recovery sequence.

An embodiment of the invention advantageously separates some of thenecessary information and places these necessary information in the datasections, so that only the corrupted control blocks related to thecorrupted data are re-built.

In one embodiment of the invention, a method for data relocationincludes: providing a free section in a free list block; obtaining anold physical block address (PBA) of an associated LBA of a used sectionthat is currently storing old data; setting the old PBA of the usedsection equal to a displaced PBA of the free section; writing new datafor the used section into the free section; and erasing the used sectionand changing the used section into a new free section. Anotherembodiment of the invention also provides an apparatus that can beconfigured to perform at least some of the above functionalities.

In another embodiment of the invention, a method for a power cyclerecovery sequence, includes: providing, in a cache, a free list blockcomprising free list entries pointing to sections in a memory in asystem; scanning the free list block to determine if each used freesection is dirty, wherein a used free section that is dirty will requirean update of a directory (DirBlk) and information directory block(BlkInfoDirBlk) that are associated with the used free section, andwherein each used free section stores user data; if a used free sectionis dirty, then performing a power cycle recovery sequence of theinformation directory block (BlkInfoDirBlk) and performing a power cyclerecovery sequence of the directory (DirBlk); scanning each free sectionthat is pointed by each free list entry; and if a free section is free,then performing a power cycle recovery sequence for the informationdirectory block (BlkInfoDirBlk), and if the free section is not free,then erasing the free section. Another embodiment of the invention alsoprovides an apparatus that can be configured to perform at least some ofthe above functionalities.

In another embodiment of the invention, a method of data relocation,includes: writing a new data to a free section, wherein the new data isfor replacing old data in a current used section and wherein the newdata includes a physical block address of the used section; determiningif the new data in the free section is valid; if the new data is valid,converting the free section into the next used section with the physicalblock address of the current used section; and erasing the old data andconverting the current used section into another free section. Anotherembodiment of the invention also provides an apparatus that can beconfigured to perform at least some of the above functionalities.

In another embodiment of the invention, a method for data recoveryincludes: in a power cycle recovery sequence, providing a minimal updatefor control blocks associated with data to be recovered. Anotherembodiment of the invention also provides an apparatus that can beconfigured to perform at least some of the above functionalities.

The above and additional advantages of the present invention will becomeapparent to those skilled in the art from a reading of the followingdetailed description when taken in conjunction with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of an example directory structure where thedirectory blocks hold the addresses of non-volatile memory blocks;

FIG. 2 is a block diagram of an example directory structure of a hybridstorage system where the directory blocks hold the addresses ofnon-volatile memory data sections;

FIG. 3 is a flow diagram of a current recovery sequence method using theredundancy technique;

FIGS. 4A and 4B are flow diagrams that illustrate a power cycle recoverysequence in accordance with one embodiment of the present invention;

FIG. 5 is a block diagram of a layout of section indices pointing tofree sections in the non-volatile memory relative to cache, inaccordance with another embodiment of the invention;

FIG. 6 is a flow diagram of the power cycle recovery sequence forupdating a BlkInfoDirBlk, in accordance with yet another embodiment ofthe invention;

FIG. 7 is a flow diagram of the power cycle recovery sequence forupdating a DirBlk, in accordance with a further embodiment of theinvention;

FIG. 8 is a flow diagram of a method of comparison between physicalblock address, in accordance with a further embodiment of the invention;

FIG. 9 is a block diagram illustrating the different cases of when toupdate the BlkInfoDirBlk and the DirBlk, in accordance with a furtherembodiment of the invention;

FIG. 10 is a block diagram of a normal operation update for aFreeLstBlk, in accordance with a further embodiment of the invention;

FIG. 11 is a block diagram of an itemized illustration of FreeLst updateof FIG. 10, in accordance with a further embodiment of the invention;

FIG. 12 is a block illustration of a data relocation, in accordance witha further embodiment of the invention;

FIG. 13 is a flowchart of the data relocation process illustrated inFIG. 12, in accordance with a further embodiment of the invention; and

FIG. 14 is a block diagram of an example storage system (or device), inaccordance with a further embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

In the following detailed description, for purposes of explanation,numerous specific details are set forth to provide a thoroughunderstanding of the various embodiments of the present invention. Thoseof ordinary skill in the art will realize that these various embodimentsof the present invention are illustrative only and are not intended tobe limiting in any way. Other embodiments of the present invention willreadily suggest themselves to such skilled persons having the benefit ofthis disclosure.

In addition, for clarity purposes, not all of the routine features ofthe embodiments described herein are shown or described. One of ordinaryskill in the art would readily appreciate that in the development of anysuch actual implementation, numerous implementation-specific decisionsmay be required to achieve specific design objectives. These designobjectives will vary from one implementation to another and from onedeveloper to another. Moreover, it will be appreciated that such adevelopment effort might be complex and time-consuming but wouldnevertheless be a routine engineering undertaking for those of ordinaryskill in the art having the benefit of this disclosure.

A power outage without notification can cause data corruption and/ordata loss in storage systems. Usually this problem is solved by animmediate update of control blocks associated with the modified data.However, this solution is time and bandwidth consuming especially incases when the data is frequently overwritten. As will be discussedbelow, embodiments of the invention provide adaptive sequences ormethods capable of data recovery after a power cycle sequence andinvolving only minimal updates of control blocks associated to themodified data.

For small end storage system, the directory structure is less complexcompared to that in the hybrid storage system. FIG. 1 is a block diagramthat illustrates an example of a directory structure for a small endstorage system. Base block (BaseBLk) 100 contains the address of thecontrol block (CtrlBlk) 101 which stores information such as thedirectories 102 (alternatively referred herein as “directory blocks102”) holding addresses for data blocks 103. The data blocks 103 aretypically non-volatile memory blocks. Each directory block (DirBlk) 102contains entries 104 which, per entry, hold the data block addresses 105for the data blocks 103 in a non-volatile memory. A particular datablock address 105 is associated with a respective data block 103.

In comparison with that of the directory structure in FIG. 1, FIG. 2 isa block diagram that illustrates a modular and hierarchal directorystructure which is efficient for a high-end, fast, hybrid storagesystem. The base block (BaseBlk) 200 contains pointers that point to acontrol block (CtrlBlk) 201. The CtrlBlk 201 contains pointers thatpoint to a directory block (DirBlk) 202 and a free list block physicalblock address (FreeLstBlkOPBA) 203. The level (or number) of directoryblocks can be one (1) or more, depending on the size of the storagesystem (also referred herein as “system”). The directory blocks 202 holdthe addresses of non-volatile memory data sections 211. As describedbelow in additional details, a data section can shift in the state frombeing a used data section to being a free data section, and vice versa.In the example of FIG. 2, a used data section 211 is in a data block 220which can be, for example, a memory block in a non-volatile memorydevice. A non-volatile memory device can be, for example, a flashchip(i.e., flash memory device) or another suitable type of memory device.The term “flashchip” or “flash memory device” is intended to include anyform of non-volatile solid-state memory, including those that use blocksof non-volatile memory cells, named flash blocks. Each memory cell (notshown) may be single or multi-level. Flash memory devices are known bythose of ordinary skill in the art. A flash memory device permits memoryoperations, such as a write or read operation, to be performed on theseflash blocks according to a protocol supported by the flash memorydevice. A flash memory device may be implemented by using a NAND flashmemory device that complies with the Open NAND Flash InterfaceSpecification, commonly referred to as ONFI Specification. The term“ONFI Specification” is a known device interface standard created by aconsortium of technology companies, called the “ONFI Workgroup”. TheONFI Workgroup develops open standards for NAND flash memory devices andfor devices that communicate with these NAND flash memory devices. TheONFI Workgroup is headquartered in Hillsboro, Oreg. Using a flash memorydevice that complies with the ONFI Specification is not intended tolimit the embodiment(s) disclosed. One of ordinary skill in the arthaving the benefit of this disclosure would readily recognize that othertypes of flash memory devices employing different device interfaceprotocols may be used, such as protocols compatible with the standardscreated through the Non-Volatile Memory Host Controller Interface(“NVMHCI”) working group. Members of the NVMHCI working group includeIntel Corporation of Santa Clara, Calif., Dell Inc. of Round Rock, Tex.and Microsoft Corporation of Redmond, Wash.

The free list block physical block address (FreeLstBlkOPBA) 203 holdsthe physical block address (PBA) of the free list block 0 (FreeLstBlk0)204 which is the first memory block in the chain holding the list of allnon-volatile memory blocks with free sections in the system. In FIG. 2,this chain has the following example free list blocks (FreeLstBlk0through FreeLstBlkN) where N is any suitable integer number depending onthe memory size available in the system. A section 211 (or “datasection” 211) is defined to be the smallest logical allocation unit inthe memory which can be relocated independently. The sections can span(can be distributed among) one or more non-volatile memory device 1410(FIG. 14), or can span one or more non-volatile memory block 220. In theexample of FIG. 2, the non-volatile memory block 220 is currently shownas including the used DataSection_0, used DataSection_1, and freeDataSection_2 through free DataSectionD. The system can store user datawithin the data sections in a single memory block 220, within datasections that is distributed among multiple memory blocks 220, withindata sections that are distributed among multiple non-volatile memorydevices 1410 (FIG. 14), and/or by another suitable method that storesthe user data in multiple memory areas. Additionally, the terms “block”or “memory block” can also mean a section, a memory page, a flashchipblock, or another type of addressable non-volatile memory area.Therefore, the terms “block” or “memory block” is not limited to just aflashchip block. A section is in its free state (i.e., a section is a“free section” or “free data section”) if the section is not associatedwith any logical block address (LBA) but can be associated anytime withan LBA. A section is in its used state (i.e., a section is a “usedsection” or “used data section”) if the section is already associated toan LBA. A free list block (e.g., free list block 204) is a non-volatilememory block holding a free section (free data section) in the system.As shown in FIG. 2, each non-volatile memory block 220 can have bothused sections 211 and free sections 207.

The details of the FreeLstBlk structure (e.g., FreeLstBlk0 204) are alsoshown in FIG. 2. The FreeLstBlk structure holds the array of free listentries 205 (e.g., FreeLstEntry0, FreeLstEntry1, and other entries) forall the non-volatile memory blocks 220 with free sections present in thewhole system. Each free list entry (FreeLstEntry) holds the sectionindex (SecIdx) 206 that points to the free section 207 which is shown asexample free data section 2 (see, “DataSection 2”) currently in thenon-volatile memory block 220 (DataBlk 220) in FIG. 2. Another examplefree section currently in the memory block 220 is free data section D(see, “DataSection D”). These free list blocks are chained by pointers(i.e., free list block 1 208 is pointed to by next free list blockphysical block address (NxtFreeLstBlkPBA) 209 and so on until all thenon-volatile blocks are covered.

The DirBlk 202 structure holds the array of directory entries 210 for aplurality of used data sections 211. In the example of FIG. 2, the useddata sections 211 are currently used data section 0 (“DataSection 0”)and used data section 1 (“DataSection 1”) in the memory block 220. Eachdirectory entry (DirEntry) contains the PBA (physical block address) 212of its associated used data section 211. As mentioned above, a sectionis in its used state if the section is already associated to an LBA(logical block address). Every used section 211 includes its user data213, its associated LBA 214, and a displaced PBA 215 which is the PBA ofthe last data section associated to the LBA 214. If directory level 1 isnot enough to accommodate the total number of used data sections, ahigher level can be created to accommodate the other used data sections.

The control block 201 also contains a pointer that point to aninformation directory block (BlkInfoDirBlk) 216. This informationdirectory block (BlkInfoDirBlk) 216 holds the array of informationentries (BlkInfoDirEntry) 217 for all the non-volatile memory blockspresent in the whole system. Each entry (BlkInfoDirEntry) holds aninvalid bit map (InvalidBitMap) 218 that flags whether a data section isinvalid or not. A data section is in its invalid state if it is notassociated to any LBA but has to be erased first before the data sectioncan be associated with an LBA. The DataSections can be in a singlenon-volatile memory Blk 220 (as shown in FIG. 2) or the DataSections canspan (e.g., can be distributed among) multiple Blocks 220, and/or theDataSections can span multiple non-volatile memory devices (e.g.,multiple memory devices 1410 in FIG. 14), so that the system can storethe user data among multiple memory areas as needed for purposes ofincreased storage efficiency and performance. It is also noted that thedashed arrow 221 from BlkInfoDirBlk 216 to DataBlks 220 does notrepresent not an actual pointer to DataBlks 220. This dashed arrow 221instead indicates that the BlkInfoDirBlk 216 contains the variousinformation or status of the DataBlks 220 as will be discussed below.

The importance of separating the information describing the status ofthe DirBlk (i.e., the presence of BlkInfoDirBlk) allows the separationof updates for each block. This separation advantageously minimizes theunwanted updates for unnecessary data, as will be discussed below, inaccordance with one or more embodiments of the invention.

For the directory structure of FIG. 1, the smallest unit that adirectory entry holds is one block which allows a simple data recoverysequence to be implemented as illustrated in FIG. 3. In FIG. 3, there isshown a flow diagram of a current recovery sequence method using theredundancy technique. Additional details of the recovery sequence ofFIG. 3 are also described in commonly-owned and commonly-assigned U.S.Pat. No. 6,970,890. In this method, the data is first written to therecovery block (RecvryBlk) in task 300. After the write is performed, intask 301 the data is verified if there are no errors. Since the data iswritten to same memory block, in task 302 the memory block is firsterased prior to any updates. In the event of a power loss when or afterthe memory block is erased, the data remains saved in the recoveryblock. If the memory block is already clean, the data (from the recoveryblock) is now written to the memory block (DataBlk) in task 303. Thewritten data in the memory block is verified if it is error-free in task304. Finally, in task 305 the recovery block is erased in preparationfor its future use in updates as similarly described in task 300 andsubsequent tasks in FIG. 3. In this technique of recovery sequence, ifused solely in the directory structure of FIG. 2, the following issueswill arise: (1) time consuming (latency), (2) bandwidth consuming, (3)difficulty in directory synchronization. These issues are due to a“domino effect” penalty as the result of the hierarchical nature (ortree structure) of the directory. For example, if an update is performedin a particular block level of the directory structure, an update isalso required for higher block levels in the directory structure so thatcoherency or synchronization is maintained with other parts of thedirectory structure that relies on the performed update. Therefore, itwould be advantageous to reduce the latency and other issues that areimposed by the tree structure of the directory. Embodiments of thepresent invention solve these issues as illustrated in FIGS. 4A and 4Band as discussed below.

Reference is now made to FIGS. 4A, 4B, and 5. FIGS. 4A and 4B are flowdiagrams that illustrate a power cycle recovery sequence in accordancewith one embodiment of the present invention. FIG. 5 is a block diagramof a layout of section indices pointing to free sections in thenon-volatile memory relative to cache, in accordance with one embodimentof the invention. The major blocks involved in this power cycle recoverysequence of FIGS. 4A-4B includes the following: BlkInfoDirBlk 216 (seeFIG. 2), DirBlk 202, and FreeLstBlk (e.g., the free list blocks in thechain that begins with the example free list block 204 in FIG. 2 andshown as example free list block 500 in FIG. 5). As shown in some of thevarious tasks in FIGS. 4A-4B, the legend “CF” means cache free list(i.e., a free list entry in a volatile memory such as, for example, acache 1408 in FIG. 14 or another type of volatile memory device), andthe legend “FS” means non-volatile memory section or flashchip section(i.e., a data section in a non-volatile memory such as, for example, thememory 1410 in FIG. 14 or another type of non-volatile memory device).When the term “cache” is used herein, it is understood by those skilledin the art that this term can also mean another suitable type ofvolatile memory device. When the term “flashchip” is used herein, it isunderstood by those skilled in the art that this term can also meananother suitable type of non-volatile memory device. In an embodiment,the memory 1410 can also be a memory array having multiple non-volatilememory devices. This power cycle recovery sequence happens duringinitialization when the system obtains power after a power interruption.The recovery of the BlkInfoDirBlk (block 216) and DirBlk (block 202) aredependent on the FreeLstBlk block, so that the aforementioned FreeLstBlk500 should be made available in cache in task 400 (FIG. 4A). When thefree list block 500 is made available in cache, this free list block 500will mirror (is equal to) the corresponding free list block 500 in thenon-volatile memory. This FreeLstBlk 500 was also referred to asFreeLstBlk 204 in the above discussion relating to FIG. 2.

Each FreeLstBlk contains an index (I) 501 (FIG. 5) and pointer 502. Thefree list entries (“F” or FreeLstEntry) of the FreeLstBlk 500 arescanned 510 starting from the entry pointed to by the index 501 (left toright) up to the pointer 502 of used free list entries, as shown in FIG.5. The system performs this scanning procedure. For example, in FIG. 5,the FreeLstBlk 500 points to sixteen (16) free list entries (free listentries 0 through 15). The system scans these free list entries F in avolatile memory 1408 (e.g., a cache). Each of the free list entries F isassociated to a free section in the non-volatile memory 1410 (e.g., aflashchip). As an example, the free list entry (FreeLstEntry0) isassociated with the free section 207 as shown in FIG. 2. Assuming duringthe start up of power, there are, for example, twelve (12) used freesections 503 (shown as blocks F with diagonal hash marks) so that thetwelve (12) used free list entries (entries 0 through 11) are candidatesfor removal in the free list. The system checks the aforementionedrespective used free sections pointed to by each of the correspondingtwelve (12) candidates 503 by scanning the aforementioned FreeLstBlk 500in task 401. Specifically, in task 401, the system checks eachrespective used free section that are pointed to by a corresponding freelist entry in the twelve free list entries, by a left-to-right scan 510,starting from the index 501 and up to the pointer 502.

The system further verifies if the particular used free section(associated with one of the used free list entries 0 through 11) isactually free (pre-erased or clean) in task 402. If the particular usedfree section is dirty (not clean or not pre-erased) in task 403, thismeans that the BlkInfoDirBlk (information directory block) and theDirBlk (directory block) saved in the non-volatile memory associated tothat particular used free section (also in the non-volatile memory)needs to be updated because that particular used section is dirty (i.e.,contains user data). This update is performed in Task 404 and Task 405.Task 404 illustrates the power cycle recovery sequence for updating theBlkInfoDirBlk and is shown in additional details in FIG. 6 below. Task405 illustrates the power cycle recovery sequence for updating theDirBlk and is shown in additional details in FIG. 7 below.

Task 414 checks for the next free list entry among the candidates forremoval, and the tasks 401 through 405 are repeated in loop 412 for thenext free list entry among the candidates for removal until the lastfree list entry that is a candidate for removal has been processed bythe tasks that start at task 401.

After the last free list entry that is a candidate for removal (fromfree list block 500) has been processed by the tasks that starts at task401 (or if a particular used free section is clean in task 403), thenthe sequence proceeds to the tasks in FIG. 4B.

As mentioned above, the Tasks 401 to 405 in FIG. 4A loops until all thefree list entries that are candidates for removal are determined. Afterthe loop 412 (FIG. 4A) is completed, the system proceeds to the scanning511 of the FreeLstBlk from the pointer 502 up to the free list entrypointed to by the index 501 (right to left) until it is determined orproven that the FreeLstEntries are proven to be clean as shown in FIG.5. For example, in FIG. 5, after the FreeLstEntries 503 that arecandidates for removal were replaced with the new set of free sections504 pointed to by FreeLstEntries, the system checks the free sectionpointed to by the FreeLstEntry in task 406. Then in task 407, the systemverifies if the free section 504 is indeed clean or erased. The systemperforms the task 407 for all free sections pointed to by all theFreeLstEntries F in order to make sure that FreeLstBlk 500 containsFreeLstEntries F that all points to only clean/erased free sections innon-volatile memory. If the free section 504 (in non-volatile memory)turns out to be dirty in task 408, the system erases the aforementionedfree section (in non-volatile memory) in task 409 so that this freesection pointed to by the FreeLstEntry F (added to free list block 500)is clean/erased (i.e., will have no user data and is not associated toan LBA); otherwise, the BlkInfoDirBlk power cycle recovery sequence ofFIG. 6 is again executed in task 410. Tasks 406 through 410 loops untilthe section pointed to by the FreeListEntry is proven to be clean. Thesystem then exits this process.

Reference is now again made to FIG. 4B for purposes of an additionaldetailed discussion. In task 406, the system checks the free section 504that is pointed to by the particular FreeLstEntry, by performing a rightto left scan 511 from the pointer 501 (FIG. 5) to the index 502. Thesystem performs Task 406 after the FreeLstEntries 503 (FIG. 5) that arecandidates for removal were replaced 512 (FIG. 5) with the new set offree sections 504 (FIG. 5) pointed to by FreeLstEntries.

In task 407, the system verifies if an aforementioned free section 504is indeed clean (erased). In task 408, if the aforementioned freesection 504 is clean, the system again executes the power cycle recoverysequence for the BlkInfoDirBlk (of FIG. 6) in task 410 and proceeds totask 411. Tasks 406 through 410 will loop 415 until the free section 504pointed to by the FreeListEntry is proven to be clean. The system thenexits this process after task 411 determines that the last free listentry in the candidates 504 for addition to the free list block 500 havebeen checked in task 406 through task 410.

If, in task 408, the aforementioned free section 504 is not clean (i.e.,is dirty), then the system erases the aforementioned free section 504 intask 409 so that the free section 504 is clean in non-volatile memory.

Reference is now made to both FIG. 2 and FIG. 6. FIG. 6 is a flowdiagram of the power cycle recovery sequence for updating aBlkInfoDirBlk (e.g., block 216 in FIG. 2), in accordance with oneembodiment of the invention. As mentioned above, if a particular usedfree section 604 is dirty (not clean) (see Task 403), this means thatthe BlkInfoDirBlk and the DirBlk blocks saved in the non-volatile memoryassociated to that particular used free section 604 (also in thenon-volatile memory) needs to be updated. FIG. 6 shows the update forthe BlkInfoDirBlk (information directory block) during a power cyclerecovery sequence, while FIG. 7 shows the update for DirBlk (directoryblock) during a power cycle recovery sequence.

As stated above, if the used free section is dirty Task 403, then theinformation directory block (BlkInfoDirBlk) saved in non-volatile memoryassociated with that used free section is updated or is verified asupdated with the Task 410 shown in FIG. 6. Additionally, if a freesection 504 (FIG. 5) (added to the free list block 500) is clean in Task408, then the BlkInfoDirBlk saved in non-volatile memory associated withthat added free section 504 is updated or is verified as updated withthe Task 410 shown in FIG. 6. In FIG. 6, the BlkInfoDirBlk 216 (FIG. 2)associated for the aforementioned used free section 604 is madeavailable in cache in task 600 (FIG. 6). In FIG. 6, the legend “CB”means cache block information or volatile memory block information(i.e., BlkInfoDirBlk in volatile memory such as, for example, a cache).As similarly discussed above, this aforementioned used free section 604is pointed to by one of the free list entries F that are candidates 503(FIG. 5) for removal in the list. The system then looks for theBlkInfoDirEntry associated with the aforementioned used free section 604in task 601. As discussed above, the BlkInfoDirEntry is an entry 217 inthe BlkInfoDirBlk 216 (FIG. 2).

The InvalidBitMap flag 603 is associated with the aforementioned usedfree section 604 and is in the BlkInfoDirEntry. The system then checks,in task 602, if the InvalidBitMap flag 603 is not set because theaforementioned used free section 604 is in its used state. If theInvalidBitMap flag 603 is not in same state with that of theaforementioned used free section 604, the InvalidBitMap flag 603 is set(updated) to “0” in task 605, so that the flag 603 is updated to thecurrent state which is the used state. The system then exits thisprocess and returns to the main program of FIG. 4A. In task 602, if theInvalidBitMap flag 603 is in same state (used state) with that of theaforementioned used free section 604, then this condition means that theBlkInfoDirEntry has previously been updated and no update is requiredfor the BlkInfoDirBlk associated with the used free section 604. Whenthe BlkInfoDirEntry has previously been updated, then the process exitsand returns to the main program of FIG. 4A. Therefore, the process inFIG. 6 is performed to update the BlkInfoDirBlk associated with the usedfree section 604 if this update is needed, or is performed to verify theprevious update of that BlkInfoDirBlk.

FIG. 7 is a flow diagram of the power cycle recovery sequence forupdating a DirBlk, in accordance with one embodiment of the invention.In FIG. 7, the legend “CD” means cache directory or volatile memorydirectory (i.e., directory in volatile memory), the legend “CS” meanscache section or volatile memory section (i.e., data section in volatilememory), and the legend “CF” means cache free list entry or volatilememory free list entry (i.e., free list entry in volatile memory). If aparticular used free section is dirty (see Task 403) and after the powercycle recovery sequence for the BlkInfoDirBlk is performed (FIG. 6), thesequence for DirBlk is executed in order to perform an update on theDirBlk if needed. FIG. 7 details the DirBlk power cycle sequence. Firstin task 700, the system reads, from a DirBlk in volatile memory (e.g., acache), the logical block address (Lba) 701 and the displaced physicalblock address (DisplacedPba) 702 in the aforementioned used free section604 (which also shown in FIG. 6) that is dirty. As discussed above withreference to FIG. 2, a directory entry (DirEntry) in a DirBlk 202 pointsto a used free section 211 which contains an Lba and a DisplacedPba,where the DisplacedPba is the PBA of the last data section associated tothe Lba.

Then in task 704, the system checks if the User Data 705 (of the usedfree section 604) is error free (valid). If the user data 705 turns outto be invalid, the system exits this process and returns to the mainprogram in FIG. 4A without updating the DirBlk.

An invalid user data 705 indicates that the writing of the user data(into the used free section 604) was not yet finished when system powerinterruption occurred, and as a result the DirBlk associated with theused free section 604 is not updated. Otherwise, the system makesavailable the DirBlk associated to the aforementioned used free section604 in cache, as shown in task 706.

In task 707, the system looks (searches) for the DirEntry 708 which isassociated with the used free section 604. The system then reads the Pba709 of the DirEntry 708. In task 710, the system checks whether the Pba709 is matched with the associated Pba of the Lba 701 of the used freesection 604. If the above physical block addresses (Pbas) are matched,this means that the DirBlk (associated with the used free section 604)in the non-volatile memory is already updated and the system exits thisprocess and returns to the main program in FIG. 4A. Otherwise, if theabove Pbas do not match in task 710, then in task 711 the systemcompares the used free section pointed to by the used free section index(SecIdx) 712 in the FreeLstEntry 720 and the used free section pointedto by Pba 709. As shown in FIG. 2 and FIG. 5, the section index iscontained in a free list entry in a free list block. If, in task 713,the section pointed to by the SecIdx 712 is newer than the sectionpointed to by the Pba 709, then this means that the aforementionedDirBlk is updated and the system exits this process. Otherwise, if thesection pointed to by the SecIdx 712 is not newer than the sectionpointed to by the Pba 709, then the system executes the task 714 wherethe system replaces the Pba 709 content of the DirEntry 708 with theSecIdx 712 so that the Pba 709 points to the section pointed to bySecIdx 712. The PBA 709 content in the DirEntry 708 (FIG. 7) needs to bereplaced because the system has determined that the PBA 709 content isold. The PBA 709 content is required to be replaced by a new PBA contentwhich comes from the PBA in the current FreeList Section index (SecIdx)712 which the system is scanning in the cache. The SecIdx 712 does notpoint to an older section and it points to a newer section than thesection being pointed to by the PBA 709 content.

FIG. 8 is a flow diagram of a method of comparison between physicalblock address, in accordance with one embodiment of the invention. Thelegend “FS to CS” in FIG. 8 means the system will read from anon-volatile memory section (e.g., flashchip section) and then thecontent is written to the volatile memory section (e.g., cache section).Also, prior to the start of Task 800, the DirEntry is already stored involatile memory (e.g., cache). If the DirEntry is not yet in thevolatile memory prior to the start of Task 800, then the system willread the DirEntry from the non-volatile memory (e.g., flashchip) toobtain the DirEntry content. This method provides the details of thetask 713 of FIG. 7, to compare the sections pointed to by the SecIdx 712and Pba 709. This task 713 is usually performed after determining thatthe aforementioned used free section 703 (FIG. 7) pointed to by theSecIdx 712 (in the FreeLstEntry 720) is not actually free. Moreover,this task 713 determines if the aforementioned pointed section 703 isnewer compared to that of the section 604 (FIG. 7) pointed by theDirEntry 708. In other words, the system determines if the section Pbafrom the FreeLstEntry 720 (as derived from the non-volatile memory blockPba and section index 712) is new. There are three possible outputs asillustrated in the three cases shown in FIG. 9. The three outputs canbe: (1) if the section pointed by the FreeLstEntry and by the DirEntryis equal, then there is no need to update the DirBlk; (2) if the sectionpointed by the FreeLstEntry is new, then the system updates the DirBlk;and (3) if the section pointed by the FreeLstEntry is invalid, then thesystem updates the BlkInfoDirBlk.

Referring now to FIG. 9, there is shown a block diagram illustrating thedifferent cases of when to update the BlkInfoDirBlk and the DirBlk, inaccordance with one embodiment of the invention. This first case (case1)900 is a possible case during the system's traversing of the sections asindicated in reference block 910. In the first case (Case1) 900, thesection (S) pointed by the DirEntry 901 (in a DirBlk) is the samesection (S) pointed to by the FreeLstEntry 902 (in a FreeLstBlk). Forthis first case 900, the updates of either the BlkInfoDirBlk or DirBlkare unnecessary. In this case 900, the section 915 pointed to by theFreeLstEntry 902 is new, but the DirBlk is already updated andtherefore, no update is required for the DirBlk.

The second case (case2) 903 is another possible case during the system'straversing of the sections as indicated in reference block 911. In thesecond case (Case2) 903, the section pointed to by the FreeLstEntry 905is not equal to the section pointed to by the DirEntry 904 and is newerthan the section pointed to by the DirEntry 904. For this case 903, theDirBlk requires an update.

The third case (case3) 906 is another possible case during the system'straversing of the sections as indicated in reference block 912. In thethird case (Case3) 906, the section pointed to by the FreeLstEntry 907is invalid (i.e., the section 51 pointed to by the DirEntry 908 is newerthan the section S2 pointed to by the FreeLstEntry 907). For this case906, the BlkInfoDirBlk needs an update. For example, the section S1'sInvalidBitMap 218 (FIG. 2) in a BlkInfoDirEntry block (in BlkInfoDirBlk216) must be set to the invalid state.

Reference is now made to both FIG. 7 and FIG. 8. As noted above, theprocess in FIG. 8 are the steps in task 711 (FIG. 7), where the systemwill compare the sections pointed to by the Section index (SecIdx) 712and the Pba 709. Other conditions or definitions are indicated inreference block 810 for the method in FIG. 8. Note also that in FIG. 8,at the start in block 800, the system will read, from the flash memoryto the cache, the section pointed by “Given”, where the reference block810 defines “Given” as the Section Pba from the FreeListEntry derivedfrom Block Pba plus (+) the Section index. In FIG. 8, the legend “FS toCS” denotes reading from the non-volatile section (e.g., flash section)to the volatile section (e.g., cache section). If the DirEntry is not inthe volatile section, then the system obtains the DirEntry from thenon-volatile section. Note also that in FIG. 8, the system has alreadycompared the Lba because FIG. 8 is a process performed in block 711. Themethod of FIG. 8 starts by the system reading, from cache, the sectionpointed by a given Section Pba from the FreeLstEntry 902 (FIG. 9) intask 800. In task 801, the logical block address (LBA) of the sectionbeing pointed by the “Given” (reference block 810) is saved as CompareLBA (CompLBA). Then in task 802, the physical block address (PBA)associated with the compare LBA (CompLBA) is read and is compared withthe PBA from the DirEntry 901 (FIG. 9) in task 803. Since in task 801,the LBA (which is pointed to by FreeLstEntry 902) is saved as CompLBA,the FreeLStEntry 902 is associated with the above-mentioned PBAassociated with the CompLBA. If the PBA (“given Section Pba”) associatedwith the compare LBA (CompLBA) is equal to the PBA from the DirEntry901, there is no need for any updates because the DirBlk is alreadyupdated as shown in case1 900 of FIG. 9. On the other hand, if the givenPBA associated with the compare LBA is not equal to the PBA from theDirEntry 901, the DisplacedPba of the last section in volatile memory(e.g., cache) is set as the current displaced PBA (CurrDisplacedPba) 726(in FIG. 7) in task 804. Therefore, in task 804, the system again readsthe non-volatile memory (e.g., flashchip), obtains the previoussection's Pba (which was labeled above as DisplacedPba), and saves thisDisplacedPba as CurrDisplacedPba. Therefore, the CurrDisplacedPbaindicates a Pba of a particular section as the system is traversing thesections read from non-volatile memory as discussed FIGS. 8 and 9.

In task 805, the system evaluates if this DisplacedPba (which the systemhad obtained via traversal to the previous section in non-volatilememory and had saved in CurrDisplacedPba) is equal to the Pba in theDirEntry. If in task 805, the CurrDisplacedPba is equal to the PBA fromthe DirEntry, then the DirBlk 904 needs to be updated in accordance withcase2 903 (FIG. 9) because the section S pointed by the FreeLstEntry 905is newer than section 920 pointed to by the Pba from the DirEntry inDirBlk 904; otherwise, the system checks if the section in non-volatilememory pointed to by the CurrDisplacedPba is clean or erased in task806. Note also that in task 806, the CurrDisplacedPba did not yet matcha Pba from the DirEntry. If this section pointed to by theCurrDisplacedPba is already clean (as shown by erased section 925), thenthe section pointed to by the FreeLstEntry 907 is invalid, andtherefore, the BlkInfoDirBlk needs to be updated in its invalid bit mapvalue 218 (FIG. 2) in accordance with case3 906; otherwise, thisaforementioned section (pointed by the CurrDisplacedPba) is read fromcache in task 807. Note that in task 806, if the CurrDisplacedPbasection is clean or erased, then a criteria (case1) 908 (FIG. 9) for thesystem to end the search (traversal) of the sections in non-volatilememory has been satisfied (see also reference block 914). When thecriteria 908 has been satisfied, the system has traversed to the erasedsection F (free section F), and the system will then end the search ofthe sections and will not update the DirBlk 908, since the system didnot find any section (identified as CurrDisplacedPba section duringtraversal) that matched the Pba from DirEntry 908. Referring back totask 806, if the CurrDisplacedPba section is not erased, then the systemperforms task 807. The system reads from the volatile memory (e.g.,cache) the section pointed to by the CurrDisplacedPba in task 807. TheLba from the aforementioned section is then compared with the compareLBA in task 808. If the compare LBA is not equal to the LBA from thesaid section, then the BlkInfoDirBlk needs to be updated. The searchingfor Case1 900 ends when the section pointed by the DiplacedPba isalready erased as illustrated in case1 908. Furthermore, the searchingfor Case2 903 ends when the section pointed by the DisplacedPba isassociated in a different LBA as illustrated in case2 909 because thisLba mismatch may indicate, for example, that the section containsanother user data (see also reference block 916). In case2 909, thesystem has traversed to the last section S on the left, and the Lba ofthis last section is different from the Lba of the section pointed bythe Pba from the FreeLstEntry 907. The system will end its search(traversal) of the sections when this mismatch of LBAs occurs in task808.

When the free list 902 (FIG. 9) is pointing to the same section 915 asthe directory entry 901, the DirBlk is already updated. Therefore, thetask 803 returns a case1 900 where the DirBlk is not updated.

When the free list 905 (FIG. 9) backward traverses the previous sectionsS and when the Pba of the directory entry 904 at section 920 matches theCurrDisplacedPba of the free list 905, the system returns a case2 903because the Pba of the directory is old and an update will, therefore,be required for the DirBlk. Note that the Pba (CurrDisplacedPba) of thefree list 905 is displaced due the backward traversal of the free list905).

When the free list 907 (FIG. 9) backward traverses the previous sectionsS and when the CurrDisplacedPba of the free list 907 does not match thePba of the directory entry 908 at section S1 and when theCurrDisplacedPba of the free list 907 matches an erased section 925, thesystem returns a case3 906 as discussed above with respect to task 806.

The system loops back from task 808 to task 804 if, in task 808, thecompare LBA is equal to the LBA from the section pointed by theCurrDisplacedPba. The system performs this loop until the criteria intask 805 or task 808 is satisfied.

After the system performs the above tasks 713 and 714, the system thenexits this process in FIG. 7 and returns to the main program of FIGS.4A-4B. Tasks 401 to 405 of FIG. 4A loops until all the free list entriesthat are candidates for removal are determined. After thisdetermination, the system proceeds the scanning of the FreeLstBlk fromthe pointer 502 up to the entry pointed to by the index 501 (right toleft), to determine if the free sections are clean as shown in FIG. 5.For example in FIG. 5, after the FreeLstEntries 503 that are candidatesfor removal are replaced with new set of free sections 504 pointed to byFreeLstEntries, the system checks the section pointed to by theFreeLstEntry in task 406 (FIG. 4B). Then in task 407, the systemverifies if the section is indeed clean or erased. If the section turnsout to be dirty in task 408, the system erases this section in task 409;otherwise, the BlkInfoDirBlk power cycle recovery section of FIG. 6 isagain executed in task 410. Tasks 406 to 410 will loop 415 until thesection pointed to by the FreeListEntry is proven to be clean. Thesystem then exits this process of FIGS. 4A-4B.

After the process illustrated in FIGS. 4A-4B is performed, the systemproceeds with performing any processes that were interrupted during thepower failure of the system.

Typically, every time the control blocks in cache become dirty, thecontrol blocks stored in non-volatile memory are also updated. However,for very hierarchical directory structures, constant updates areinefficient as discussed above. Consequently, an embodiment of thepresent invention implements the following thresholds and backgroundtasks that allow the sequences to be sufficiently adaptive to determinewhen these directories need to be updated, thereby minimizing directoryupdates. Background tasks preferably occur when the system is, forexample, idle.

TABLE 1 Threshold for FreeLstBlk Update When to update the FreeLstBlksaved in the non-volatile memory [1] Due Update the FreeLstBlk saved inthe non-volatile memory, due to the update of FreeLstBlk in volatilememory (e.g., cache) of which it should preferably always be the same.

In the discussion below and in other parts of this disclosure, the term“cache” can also mean other suitable types of volatile memory. Table 1illustrates an example threshold for the FreeLstBlk update. TheFreeLstBlk 500 (FIG. 5) in cache is updated when the free countthreshold is reached. For example this threshold is reached when thefree sections pointed to (by the FreeLstBlk) are almost empty. Forexample, in a 64 GB disk size, the reserved space for free sections isabout 1 GB and every FreeLstEntry consumes about 4 KB; hence, there willbe about 262,144 FreeLstEntry entries. If the threshold for the usedfree sections is 80% of 262,144, this means that there will be 209,715write commands that occurred before an update of FreeLstBlk. Thethreshold can be set to other values such as approximately 75% or otherthreshold values. This threshold can be configured in, for example, in afirmware that is loaded in the system. Therefore, the amount of usedfree sections (dirty section) accumulated in cache (due to an update ofFreeLstBlk in cache) will need to reach a threshold, as discussed above,before an update is performed on the FreeLstBlk saved in thenon-volatile memory (e.g., flash memory).

TABLE 2 Threshold for BlkInfoDirBlk Update When to update theBlkInfoDirBlk saved in the non-volatile memory [1] Due to the update ofFreeLstBlk of which BlkInfoDirBlk is dependent. [2] The BlkInfoDirBlk inthe cache is candidate for update due to lack of free BlkInfoDirBlk inthe cache. [3] If the BlkInfoDirBlk in the cache is too dirty. Thisupdate is only performed during background task.

Similarly, if the BlkInfoDirBlk is fully cached, condition [2] of Table2 is not performed; otherwise, an update of BlkInfoDirBlk innon-volatile is performed. Otherwise stated, in condition [2], theBlkInfoDirBlk saved in the non-volatile memory is updated when there isa lack of free BlkInfoDirBlk in the cache. A cache coherency algorithmprogram, as known to those skilled in the art, can be used to performthe functions as stated in condition [2].

The BlkInfoDirBlk in cache is also updated in the non-volatile memorywhen the FreeLstBlk is updated of which the BlkInfoDirBlk is dependentas stated in condition [1].

The BlkInfoDirBlk is also updated in the non-volatile memory whencondition [3] is satisfied, where a threshold value (e.g., approximate75%) of the BlkInfoDirBlk in the cache is dirty. This update of theBlkInfoDirBlk in the non-volatile memory is preferably only performedin, e.g., the background task.

TABLE 3 Threshold for DirBlk Update When to update the DirBlk saved inthe non-volatile memory [1] Due to the update of FreeLstBlk of whichDirBlk is dependent. [2] The DirBlk in the cache is candidate for updatedue to lack of Free DirBlk in the cache. [3] If the DirBlk in the cacheis too dirty. This is only done during background task.

Similarly, if the DirBlk is fully cached, condition [2] of Table 2 isnot performed; otherwise, an update of DirBlk in non-volatile memory isperformed. The DirBlk in cache is updated in non-volatile memory whenthe FreeLstBlk is updated of which the DirBlk is dependent as stated incondition [1]. The DirBlk is also updated when condition [3] issatisfied.

FIG. 10 is a block diagram of a normal operation update for aFreeLstBlk, in accordance with one embodiment of the invention. ThisFreeLstBlk update sequence and data recovery is performed during boot-upwhenever the power fails during the execution of the update process.This sequence in FIG. 10 will flush out all dirty DirBlk, FreeLstBlk,and BlkInfoDirBlk blocks. Additionally, in an embodiment of theinvention, when the system updates the free list block (FreeLstBlk) 203(FIG. 2), the system will also update the directory block (DirBlk) 202and block information directory block (BlkInfoDirBlk) 216, in order tomaintain proper synchronization of these blocks and perform properupdates as discussed above. The legend “CB to FB” means cache blockinformation to flashchip block information. The legend “CD to FD” meanscache directory to flashchip directory. The legend “FF” means flashchipfree list, while the legend “CF” means cache free list. First, thesystem collects all the invalid sections ready for erase in task 1000.Then in task 1001, all dirty DirBlk in the non-volatile memory isupdated using a suitable redundant recovery method such as, for example,the redundant recovery sequence of FIG. 3. Similarly in task 1002, alldirty BlkInfoDirBlk in the non-volatile memory is updated using asuitable redundant recovery method such as, for example, the sequence ofFIG. 3. Note also that other possible conditions or details are shown inat least some of the reference blocks 1010, 1011, 1012, 1013, 1014,1015, 1016, and 1017 in the method of FIG. 10.

Reference is now made to both FIG. 10 and FIG. 11. As shown, FIG. 11 isa block diagram of an itemized illustration of FreeLst update of FIG.10, in accordance with one embodiment of the invention. In task 1003,the system replaces the used FreeLstEntries covered from the entrypointed by the index 1102 up to the FreeLstEntry before the pointer 1103as shown in FIG. 11. However, prior to the above-replacement of the usedFreeLstEntries, the FreeLstBlk in non-volatile memory 1100 is mirroredto cache 1101. In the FreeList composition of FIG. 11, each number(numeral) in the drawing contains a Block PBA pointed to one free block.Initially, the index 1102 points to the very first free FreeLstEntry1120. As the FreeLstEntries are being used up, the pointer 1103increments. After sometime, when the threshold 1104 (for example, eight(8) used FreeLstEntry) is reached, the aforementioned FreeLstBlk needsan update in non-volatile memory (e.g., flashchip or any other suitabletype of non-volatile memory). Then in task 1004 (FIG. 10), the systemupdates the FreeLstBlk in the non-volatile memory using a suitableredundant recovery method such as, for example, the sequence of FIG. 3(i.e., the FreeLstBlk in the cache is written to the non-volatile memory1105). The value of the FreeLst index 1102 is then changed to be equalto the value of the pointer 1106 in task 1005. As shown in FIG. 11, theindex 1102 and pointer 1106 have the same value of entry (9) 1125. TheFreeLst counter 1102 is then set to 0 in task 1006. The system erasesthe invalid blocks in the non-volatile memory for compacting or garbagecollection in task 1007. Furthermore in task 1008, the system sets theInvalidBitMap flag to 0, meaning the sections are set to valid. Finallyin task 1009, since the BlkInfoDirBlks are modified by executing task1008, the system updates all the dirty BlkInfoDirBlk using the redundantrecovery method. The redundant recovery method is used in task 1009 sothat a write is not performed in any free list sections, since writingto a free list section will affect the upstream nodes in a directorytree.

Additionally, in Task 1000, the BlkInfoDirBlk and the DirBlk can berecovered during initialization of system in FIG. 4. In Task 1001, theBlkInfoDirBlk can be recovered during initialization of system in FIG.4. In Task 1002, the DirBlk can be recovered during initialization ofsystem in FIG. 4. In Task 1009, the BlkInfoDirBlk can be recoveredduring initialization of system in FIG. 4.

FIG. 12 is a block illustration of a data relocation, in accordance withone embodiment of the invention. This drawing in FIG. 12 particularlyillustrates another normal operation that performs the frequent updatesof the sections. Unlike the control blocks update that uses theredundant recovery sequence of FIG. 3, the sections are updated byrelocation because it is inefficient to use the aforementioned redundantmethod of FIG. 3 because the sections are always updated every now andthen or more frequently.

Reference is now made to FIG. 12 and FIG. 13. As shown, FIG. 13 is aflowchart of the data relocation process illustrated in FIG. 12, inaccordance with one embodiment of the invention. Also shown in FIG. 13is the data recovery sequence whenever the power fails during theexecution of the aforementioned update process. Other possible detailsor conditions in the method of FIG. 13 are shown in at least some of thereference blocks 1307, 1308, 1309, 1310, 1311, 1312, and 1313. First,the system in task 1300 asks for free section 1200 (FIG. 12) in theFreeLstBlk. Then in task 1301, the system makes the associated DirBlkfor the given LBA by the host (non-volatile memory) to be available incache. Prior to task 1301, this associated DirBlk is not yet in cache.However, if DirBlk is already available in cache, then there is no needto obtain this content from the non-volatile memory. Therefore, the task1301 is already satisfied and not performed if DirBlk is already incache.

In task 1302, the system then obtains the old PBA of the associated LBAof the previous section 1201 (shown as user section 1201 in FIG. 12A).Then in task 1303, the system modifies the LBA and the DisplacedPba inthe statistics of the section in cache (i.e., the previous PBA is nowequal to the DisplacedPba of the new section). Then in task 1304, inprocess 1210, the new data 1202 for used section 1201 is written to afree section 1200. If, for example, the power fails in the middle ofwriting the new data 1202 to the free section 1200, the old data in usedsection 1201 is still considered valid.

Note further that tasks 1300, 1301, 1302, 1303, and 1304 use informationin the control blocks of the old data 1201 in order to perform theoperations associated with these tasks. The information needed in olddata 1201 is the Lba and the DisplacedPba.

In process 1215, after assuring that all new data 1202 has been writtento free section 1200, the old used section 1201 can now be erased andmarked as a new free section 1203 and now ready to carry new data (i.e.,the system modifies the PBA of the DirEntry to the new given freesection's PBA in task 1305; and in task 1306, the system also sets theInvaldiBitMap of the BlkInfoDirBlk of the old section to invalid). Aslong as a section has never been marked as free in the event of powerfailure, this old data will still be valid. The conversion of oldsections to free sections is performed in one action so that when powerfails, all sections are synchronized as either old or new. In the eventof power failure occurring during this data relocation process, theredundant data recovery method is executed. Data recovery is performedduring start-up in which the system will first read the content of thefree sections one by one to determine whether it contains a valid data.If a free section contains a valid data it will be marked as a usedsection 1204.

Note that in task 1305, the DirBlk (in cache) will be recovered duringthe system initialization and the free list detects the free section asnot actually free as shown in FIG. 11.

In task 1306, the BlkInfoDirBlk (in cache) will be recovered during thesystem initialization and the free list detects the free section as notactually free and contains a displaced Pba as shown in FIG. 10.

FIG. 14 is a block diagram of an example storage system (or storagedevice) 1400, in accordance with one embodiment of the invention. Thisexample system 1400 is configurable to perform the data recoveryfunctions or features described herein.

Typically, the storage device 1400 is coupled to a host 1402 through aperipheral interface 1404, such as SCSI, Fibre Channel, ATA, IDE, and/orthe like, permitting the host 1402 to perform storage operations on thestorage device 1400, such as write and read operations. The storagedevice 1400 is shown having a Memory A 1406, a Memory B 1408, a systembus, a memory bus, a local processor 1418 and associated circuitry. Inaddition, a Processor Circuit 1424, a Local Processor Memory 1422, a ROM1420, and their general interaction with the storage device 1400 appearin the block diagram but are not described to avoid overcomplicating theherein disclosure. Additionally, some of the elements or components inthe storage device 1400 can be varied or substituted in a manner thatwould achieve the functions or operations described herein.

In one embodiment, the Memory A 1406 typically includes at least onebank of NAND Flash memory 1410 and a flash memory buffer circuit 1412,which is coupled to a memory controller 1414, such as, for example, aDMA controller. The Memory A 1406 is intended for use as the primarystorage memory of the device 1400 and more than one set may be used toincrease capacity and/or performance. In the previous discussion above,the memory 1410 is referred to as a non-volatile memory. As one example,this non-volatile memory that forms the memory 1410 is a flashchip,although this non-volatile memory may be other suitable types of memorydevices. In one embodiment, one DMA controller is used for every setimplemented.

The Memory B 1408 typically includes a DRAM (or its equivalents, such asSDRAM, RDRAM, etc.) and is used as a read/write (“storage”) cache toMemory A 1406. In the previous discussion above, the Memory B 1408 is avolatile memory such as, for example, a cache as also referred to in theprevious discussion above. The Memory B 1408 can also be other suitabletypes of volatile memory. The Memory B 1408 is controlled by at leastone DMA memory controller (not shown) although more than one controllermay be used to increase performance. Two DMA controllers (not shown) areused and provided using the local processor, which is, for example, aRISC processor having two embedded DMA controllers or other suitableprocessors.

The conduit between the peripheral interface 1404 is a simplifiedrepresentation of a peripheral bus 1430 and may include switches,routers, and network devices but are not shown to avoid complicating theherein disclosure. For example, if the peripheral interface 1430 isimplemented using a fibre channel interface, then at least one portprovided by a switch would be part of the conduit between the peripheralinterface and the host.

It is also within the scope of the present invention to implement aprogram or code that can be stored in a machine-readable orcomputer-readable medium to permit a computer to perform any of theinventive techniques described above, or a program or code that can bestored in an article of manufacture that includes a computer readablemedium on which computer-readable instructions for carrying outembodiments of the inventive techniques are stored. Other variations andmodifications of the above-described embodiments and methods arepossible in light of the teaching discussed herein.

The above description of illustrated embodiments of the invention,including what is described in the Abstract, is not intended to beexhaustive or to limit the invention to the precise forms disclosed.While specific embodiments of, and examples for, the invention aredescribed herein for illustrative purposes, various equivalentmodifications are possible within the scope of the invention, as thoseskilled in the relevant art will recognize.

These modifications can be made to the invention in light of the abovedetailed description. The terms used in the following claims should notbe construed to limit the invention to the specific embodimentsdisclosed in the specification and the claims. Rather, the scope of theinvention is to be determined entirely by the following claims, whichare to be construed in accordance with established doctrines of claiminterpretation.

What is claimed is:
 1. A method for maintaining data, the methodcomprising: accessing a free list associated with a non-volatile memory(NVM), wherein the NVM includes a plurality of NVM blocks, wherein eachof the plurality of NVM blocks includes a plurality of NVM sections, andwherein the free list includes one or more free list entries, whereineach free list entry corresponds to a free block and points to a freesection within the free block, wherein each free block comprises an NVMblock including one or more free sections, wherein each free sectioncomprises an NVM section not associated with a logical address andwherein the one or more free list entries include a first free listentry corresponding to a first free block and pointing to a first freesection within the first free block; maintaining a state map, whereinthe state map indicates a validity state for each of the plurality ofNVM sections; maintaining a directory identifying allocated sections ofthe NVM, wherein the directory includes a plurality of directoryentries, wherein each directory entry indicates a physical address of anallocated section, wherein each allocated section comprises an NVMsection associated with a logical address; performing first scanningoperations and second scanning operations for one or more of the freelist entries, including the first free list entry, wherein: performingthe first scanning operations for the first free list entry includes:scanning allocated sections in the first free block to identify dirtysections, wherein each dirty section comprises an allocated sectioncontaining user data; and for each of the dirty sections, performingfree list removal operations, wherein the free list removal operationsinclude: updating the state map to reflect current validity states ofthe dirty sections; and updating directory entries associated with thedirty sections; and performing the second scanning operations for thefirst free list entry includes: scanning allocated sections in the firstfree block to identify dirty sections and clean sections; erasing eachof the dirty sections; and updating the state map to reflect currentvalidity states for each of the clean sections.
 2. The method of claim1, further comprising: maintaining a control block, wherein the controlblock includes: a directory pointer indicative of an address of adirectory associated with the directory entries; and a free list pointerindicative of an address of the free list.
 3. The method of claim 1,further comprising: performing the first scanning operations and thesecond scanning operations for each of the free list entries.
 4. Themethod of claim 1, wherein the state map includes a map directory,wherein the map directory includes a plurality of map directory entries,wherein each map directory entry is associated with a corresponding NVMblock and wherein each map directory entry includes a bit map comprisinga plurality of bit map values, including a bit map value correspondingto each section in the corresponding NVM block, wherein each bit mapvalue indicates a validity state of a corresponding section.
 5. Themethod of claim 1, wherein updating directory entries associated withthe dirty sections includes updating a first directory entry associatedwith a first dirty section and wherein updating the first directoryentry includes: comparing a first physical address with a secondphysical address, wherein the first physical address comprises aphysical address of the first dirty section and wherein the secondphysical address comprises an address indicated in the first directoryentry; responsive to determining that the first physical address differsfrom the second physical address, determining whether a first section ofthe NVM, comprising a section at the first physical address, is newerthan a second section of the NVM, comprising a section at the secondphysical address; and responsive to determining that the first sectionis not newer than the second section, modifying the first directoryentry to point to the first physical address.
 6. The method of claim 5,wherein the first directory entry is associated with a first NVM blockand wherein the first physical address is determined based on a physicaladdress of the first NVM block and an index value.